The present invention relates to a semiconductor device having a semiconductor element operated at a predetermined operating voltage and a semiconductor element operated at an operating voltage lower than the operating voltage of the former semiconductor element. Both of the semiconductor elements are simultaneously formed on the same semiconductor substrate, and which is capable of making full use of performance of the semiconductor elements.
In general, two types of semiconductor elements different from each other in operating voltage have been built in a semiconductor device like an IC corresponding to an assembly of semiconductor elements like MOSFETs.
A technology for building a low voltage-operated field effect transistor, i.e., a low voltage transistor and a high voltage-operated field effect transistor, i.e., a high voltage transistor into a single substrate has been disclosed in, for example, Japanese Patent Application Laid-Open No. Hei 11(1999)-330267.
In order to solve a problem that arises due to the application of impurity regions of the same impurity concentration for the purpose of respective sources/drains of the low voltage transistor and the high voltage transistor, a proposal to form impurity regions of concentrations lower than those of the impurity regions for the low voltage transistor or their intermediate concentrations in the impurity regions for the low voltage transistor as extension regions has been made to the related art.
According to the related art, however, the respective pairs of impurity regions for the low voltage transistor and the high voltage transistor respectively comprise first impurity areas each indicative of a predetermined impurity concentration by an impurity indicative of a conductivity type opposite to a conductivity type of the semiconductor substrate, and second impurity areas which extend toward their corresponding gates from the first impurity areas and which indicates the same conductivity type as the first impurity areas and are indicative of impurity concentrations lower than those of the first impurity areas. When the second impurity areas are suitably set for the relaxation of an electric field applied to the high voltage transistor, an effective gate length of the low voltage transistor becomes short due to such setting and hence the low voltage transistor will incur a short channel effect.
On the other hand, when the second impurity areas are set so as not to incur the short channel effect in the low voltage transistor, the high voltage transistor is not capable of obtaining a sufficient field relaxation effect, thus resulting in incurring of a hot carrier effect in the high voltage transistor.